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- Hacker News
- Would be interesting to see how much a PTP-aware switch would impact the jitter, and whether 802.1AS is possible.by asgeirn
- I wish I had a switch that supported both PTP boundary clock and transparent clock configurations, so I could test the two side by side. My guess is either mode would add somewhere around 10 ns per switch, maybe a bit more depending on the hardware, but I haven't measured it myself.
- In general? It doesn't, at least negatively. Aristas are great.by subscribed
- I saw guides for how to do it with the pi5, but I couldn't get it to lock to the pps reliably and chrony said I had way more jitter on pps and nmea than there should've been. Might try following this one minus the difference in ppsby Neywiny
- are you trying to use gpio for the pps? feeding the pps into the NIC clock is what gets you the great accuracy, doing it with gpio on the main processor will have much worse jitterby Palomides
- There's not a word about chess here! Re-title!
Just kidding. Learned a bunch here after I understood the actual topic.
by mwexler - I will preface this with I am very supportive of time nerdery. I am thrilled that this person is build and documenting that build.
I will now commence shitposting, so please look away now.
Booo use a pendulum like a real time lord: https://gentsofleicester.com/project/alanb/
Obviously you really want a tank/vacuum master clock, but they are expensive and big. this GPO Type 46 however is small and more importantly gives off a pleasingly happy ticking noise. (tickety-a-tock, tickety-a-tock, then every 15 seconds a Clonk as the magnets fire)
by KaiserPro - Or you could head up north and meet the true Grand Master... sorry, T'Grand Master. Oooh, and 'e were grand! 'E were full of wise sayings like "There's nowt wrong wi'owt what mitherin' clutterbucks don't barley grummit!". Of course you'll have to wear t'at of a novice initially...
- >The key hardware fact: The CM4 uses the BCM54210PE Ethernet PHY which has full IEEE 1588v2 hardware timestamping support. This is what makes sub-microsecond PTP possible on the CM4. The BCM54210PE timestamps packets right at the wire inside the PHY, before the packet touches the kernel network stack. This eliminates the jitter that comes from kernel scheduling and interrupt handling.
Very cool feature I wasn't aware of because I'm not a true Chime Head.
- RevK's recent stratum 1 server hardware [0] is worth a look. As are the notes [1] that someone wrote up after using it in the UK NTP pool for a couple of weeks.
[0] https://www.revk.uk/2026/07/time-for-something-new.html
[1] https://codeberg.org/RevK/ESP32-GPSNTP/src/branch/main/RevK%...
by pekim