Birbla

Join the discussion

Write your take first — we'll ask for email only when you're ready to publish.

Sign in
  • Hacker News
  • I see this as worse for junior engineers than senior. Right now junior engineers don't have the experience to spot issues, ans if gpt-synopsys gives an answer they don't know to question it. It Will also be better than many junior engineers out of the box.. So junior engineers dont get a chance to learn and progress to senior. Senior engineers (for now) will interact with these agents and review the output, ans can direct them. Again, until it becomes better at that.

    Interesting times. A lot has happened in a year..where will we be a year from now?

    by tails4e
  • A question to those active in chip design industry: Are formal methods and formally proving a design more prevalent and normal in this industry compared to general software development?

    Like for a Arm microcontroller design, do engineers thoroughly test and formally prove the correct functionality of every component? If that's the case, why silicon errata is a thing?

    by ducktective
  • We just buried an ASIC design that was nearly finished. Reason: There was a deviation that would've needed a mask change, but because of AI chip demand, the manufacturer wanted so much money for it, that we said screw it.

    So we now have AI powered chip design tools that make chip design cheaper, but because of AI, chip manufacturing has become so expensive, that we can't afford it anymore.

    Nice.

    by karlkloss
  • Give us more open source EDA tools, not more hyped up EDA vendors.
    by amelius
  • „The joint service offering will provide the bundled compute, model, and licenses, while ensuring customer-specific design data is protected.“

    I am not sure if Nvidia want to send their chip designs to OpenAI.

    by joennlae
  • > I see you are using Cadence IP in your project, unfortunately this is not allowed per the terms and conditions and you will be reported to the authorities

    Also : create proprietary locked down eda->no data to train models->models suck at it->reach out to ai lab to rl on it -> expect users to pay for eda and the model.

    by aniceperson
  • So they are working with OpenAI to create an LLM that is trained on how to "expertly" use Synopsis tools. This is:

    - Synopsis admitting that their tools are very difficult to use (not a flex)

    - Synopsis doubling down on keeping their tools as expensive and proprietary as possible (not letting all LLMs train to use their tools, just this GPT-Synopsis LLM)

    - OpenAI announcing a new (very not open) business model where you can pay them to create an exclusive proprietary LLM that can help people use your crappy product

    Just amazing :-|

    UPDATE: just realized that this LLM can also suggest that you buy more licenses of Synopsis tools since that will be the limiting factor to your productivity once this LLM makes everything else better. Yay.

    by krupan
  • From an investment perspective, I think chip fabs TSMC, Intel, and Samsung will benefit from better AI chip design tools.

    If AI made it 100x faster and cheaper to build software, you suddenly have an explosion of software that need to be hosted. So companies like AWS/iOS App Store/cloud companies benefit.

    If AI makes designing chips 100x faster and cheaper, you will have an explosion of custom chips for all sorts of applications. These chips still need to be physically made at TSMC, Intel, or Samsung.

    Apple says it takes 3-4 years to design each Apple Silicon generation.[0] So the M6 was being designed in 2022-2023 already. Reports are that it costs hundreds of millions to a billion to design a cutting edge chip from scratch to finish.[0]

    The cool thing is that we'll have niche ASIC chips for accelerating special applications that previously didn't have big of a market for someone to make a profit on. This is the same thing with software today. It's much easier to build custom software for a small niche and be profitable today than in 2022.

    Maybe some day, a kid in his garage can just tell an AI to design a custom chip, send it to TSMC, and get the chip in the mail in a few weeks.

    And given that Moore's Law is essentially dead in terms of density scaling, having an AI to automatically optimize the hell out of design and squeeze as much performance as possible out of the transistors could help us have a few more years of nice performance increase.

    [0]https://fireflies.ai/blog/johny-srouji-and-john-ternus-inter...

    [1]https://www.granitefirm.com/blog/us/2023/04/29/cost-of-chip-...

    by aurareturn

Explore Birbla archives